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概要
A multi-talented and enthusiastic person, having experience in Production Engineering and have more than 3-year experience in VLSI design firm.
项目
工作经历
Production Engineering Engineer
Process R&D, Innovations and Automation , Data Acquisition from devices and machines ,Software development for lean manufacturing and tracking of product , SQL database development.
Senior IC Design Engineer
• Design Analog IC mask design on Cadence Virtuoso 6.1.5 and Cadence Virtuoso 5.4.
• Full understanding of hierarchical planning (top down and bottom up) and integration.
• Floor planing with ideal placements.
• Verify all necessities of WPE, DFM, Matching, Density, ESD and Latchup issues.
• Delivering high quality layout that conforms to all design requirements.
• Provide accurate schedules.
• Meeting project milestone deadlines
• Full self-sufficiency in debugging complex verification failures
• Mentoring of junior layout designers.
• Provide presentations and documentations of given projects.
